OPENCORES: Mission
The need
Today, deep submicron (DSM) designs include many millions of gates in a single application-specific integrated circuit (ASIC). The number of gates continues to grow, with the result that design times get longer and longer. This can result in excessive time- to-market and excessive cost.
The technical solution to the problem is core re-use. This speeds up the design by enabling engineers to cooperate.
Currently, cores available for integration are proprietary and must be purchased from established vendors, often at very high prices. These costs can be burdensome, especially for small design teams with limited funding. Proprietary cores are hard to integrate due to the multiplicity of incompatible design and test tools. Usually, proprietary cores lack adequate documentation, and the purchasor does not have access to the source, which makes the task of integration much more difficult, perhaps prohibitively so.
Project objective
Our main objective is to design and publish core designs under a license for hardware modelled on the Lesser General Public License (LGPL) for software. We are committed to the ideal of freely available, freely usable and re-usable open source hardware.
Subsidiary objectives
We have set the following objectives as the means of reaching our main objective:
* Develop standards for open source cores and platforms
* Create tools and methods for development of open source cores and platforms
* Develop open source cores and platforms
* Provide documentation for these cores and platforms
by
klaus
2008-10-31 06:46
hardware
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open
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design
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technology
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knowledge
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electronics
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collaboration
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computer
simpy
